View TDA7464_5935790.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TDA7464 digitally controlled audio processor with srs surround sound and voice canceller 4 stereo inputs input attenuation control in 0.5db step treble middle and bass control voice canceller is available stereo srs surround sound with center & space control is available three standard surround modes are available: - music in 4 different selectable responses - movie and simulated in 256 different selectable responses 2 speakers outputs - independent attenuators in 1db step for balance facility - zero crossing attenuation available - independent mute function 2 record outputs - independent attenuators in 1db step for balance facility - mux available for processes signal selection - independent mute function all functions programmable via se- rial bus description the TDA7464 is a volume tone (bass middle and treble) balance (left/right) processors with stereo srs and voice canceller for quality audio applica- tions in car radio, hi-fi, tv systems. it reproduces srs (sound retrieval system) sound by external components and surround sound by using phase shifters and a signal ma- trix. the ac signal setting is obtained by resistor networks and switches combined with operational amplifiers according to the srs laboratories specification. control of all the functions is ac- complished by serial bus. thanks to the used bipolar/cmos technology, low distortion, low noise and dc stepping are obtained. september 2003 ? ordering number: TDA7464 tqfp44 1 2 3 5 6 4 7 8 9 10 17 11 18 19 20 21 22 44 43 42 41 39 40 38 37 36 35 34 28 27 26 24 23 25 33 32 31 29 30 var_l netw2 netw1 hp1 lp1 hp2 bass_li bass_lo basso_r basso_l var_r bass_ro bass_ri middle_lo middle_li middle_ri middle_ro treble_r treble_l agnd sda scl lp ps1 ps2 ps3 v s ps4 cref r_in4 r_in3 r_in2 lpvc l_in4 recout_l recout_r r_out dig_gnd l_out r_in1 l_in1 l_in2 l_in3 vrefout d96au483c 12 13 14 15 16 pin connection the device incorporates the srs wow technology under licence from srs labs, inc. 1/21
l-in1 rlp1 l-r 0.22 m f supply v s agnd cref treble 18nf middle 2.7k middle-li middle-lo 22nf rm bass bass-li mute d96au481d mute i 2 c bus decoder + latches spkr att rec att treble middle bass 18nf 22nf 2.7k 5.6nf mute spkr att mute rec att scl sda dig_gnd r-out recout-r l-out recout-l 22 m f + - + - + rhp1 lp1 hp1 hp2 5.6nf 680nf - + r6 r5 ps1 90hz 100nf ps1 rps1 sim movie/ music music ps2 4khz ps3 400hz ps4 400hz 4.7nf ps2 rps2 22nf ps3 rps3 22nf ps4 rps4 movie/ sim mixing amp lpf 9khz effect control mixing amp 1.2nf lp middle-ri middle-ro 31 1 2 3 43 42 41 40 39 20 38 44 15 14 11 25 17 16 13 27 22 21 23 24 26 + - + lpf 100nf lpvc treble-r 79db control 5.6nf treble-l 100nf 5.6k 100nf bass-lo 100nf 100nf 5.6k bass-ri bass-ro 79db control 79db control 2.2 m f basso-r var-r 30k + - + - 2.2 m f basso-l var-l 30k 79db control 10 7 6 8 9 12 18 34 19 0.22 m f 31.5db control r-in4 31.5db control 0.47 m f netw1 netw2 37 54 voice on surr srs surr rear fix 3band surr rear fix 3band fix var rb fix var 50k 50k stereo srs center space 1k 4.42k 0.47 m f 1.5k 32.4k 130k 47.5k 4.7nf 3.74k vrefout 32 rm rb v ref off fix surr srs fix + + 100k mix sw mix sw n.b. sw n.b. sw l-in2 0.22 m f 30 50k l-in3 0.22 m f 29 50k l-in4 0.22 m f 28 50k 0.22 m f r-in3 36 50k 0.22 m f r-in2 35 50k 0.22 m f r-in1 33 50k block diagram TDA7464 2/21
thermal data symbol description value unit r th j-pins thermal resistance junction-pins max. 85 c/w quick reference data symbol parameter min. typ. max. unit v s supply voltage 7 9 10.2 v v cl max. input signal handling 2 vrms thd total harmonic distortion v = 1vrms f = 1khz 0.01 0.1 % s/n signal to noise ratio v out = 1vrms (mode = off) 106 db s c channel separation f = 1khz 90 db input attenuation control (0.5db) -31.5 0 db treble control (2db step) -14 +14 db middle control (2db step) -14 +14 db bass control (2db step) -14 +14 db balance control 1db step (l ch, r ch ) -79 0 db mute attenuation 100 db absolute maximum ratings symbol parameter value unit v s operating supply voltage 11 v t amb operating ambient temperature -10 to 85 c t stg storage temperature range -55 to +150 c electrical characteristics (refer to the test circuit t amb = 25c, v s = 9v, r l = 10k w , v in = 1vrms; r g = 600 w , all controls flat (g = 0db), effect ctrl = -6db, mode = off; f = 1khz unless otherwise specified) symbol parameter test condition min. typ. max. unit supply v s supply voltage 7 9 10.2 v i s supply current 25 ma svr ripple rejection l ch / r ch out , mode = off 60 80 db input stage r in input resistance 37.5 50 62.5 k w v cl clipping level thd = 0.3% 2 2.5 vrms a range attenuation range 31.5 db a vmin min. attenuation -1 0 1 db a vmax max. attenuation 31 31.5 32 db a step step resolution -1 0.5 1 db v dc dc steps adjacent att. step -3 0 3 mv a vo1 voice canceller output 1 l in = r in , r in = on, v mix = 0v fix, 0db attenuation 567db a vo2 voice canceller output 2 l in = r in = 0v v mix = 1v rms fix, 0db attenuation -1 0 1 db TDA7464 3/21
electrical characteristics (continued) symbol parameter test condition min. typ. max. unit supply a vo3 voice canceller output 3 l in = -r in , v mix = 0v fix, 0db attenuation 567db r lpv low pass filter resistance 24 32 40 k w bass control gb control range max. boost/cut +12.0 +14.0 +16.0 db b step step resolution 1 2 3 db r b internal feedback resistance 33 44 55 k w middle control gm control range max. boost/cut +12.0 +14.0 +16.0 db m step step resolution 1 2 3 db r m internal feedback resistance 18.75 25 31.25 k w treble control gt control range max. boost/cut +13.0 +14.0 +15.0 db t step step resolution 1 2 3 db standard surround sound matrix test condition (phase resistor selection d0=0, d1=1, d2=0. d3=1, d4=0, d5=1, d6=0, d7=1 symbol parameter test condition min. typ. max. unit g off in-phase gain (off) mode off, input signal of 1khz, 1.4 v p-p , r in ? r out l in ? l out -1 0 1 db d goff lr in-phase gain difference (off) mode off, input signal of 1khz, 1.4 v p-p r in ? r out , l in ? l out -1 0 1 db g mov in-phase gain (movie) movie mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p r in ? r out , l in ? l out 8db d gmov lr in-phase gain difference (movie) movie mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p (r in ? r out ) C (l in ? l out ) 0db g mus in-phase gain (music) music mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p (r in ? r out ), (l in ? l out ) 7db d gmus lr in-phase gain difference (music) music mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p (r in ? r out ) - (l in ? l out ) 0db l mon1 simulated l output 1 simulated mode, effect ctrl = -6db input signal of 250hz, 1.4 v p-p , r in and l in ? l out 4.5 db l mon2 simulated l output 2 simulated mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p , r in and l in ? l out C 4.0 db l mon3 simulated l output 3 simulated mode, effect ctrl = -6db input signal of 3.6khz, 1.4 v p-p , r in and l in ? l out 7.0 db TDA7464 4/21
electrical characteristics (continued) symbol parameter test condition min. typ. max. unit r mon1 simulated r output 1 simulated mode, effect ctrl = -6db input signal of 250hz, 1.4 v p-p , r in and l in ? r out C 4.5 db r mon2 simulated r output 2 simulated mode, effect ctrl = -6db input signal of 1khz, 1.4 v p-p , r in and l in ? r out 3.8 db r mon3 simulated r output 3 simulated mode, effect ctrl = -6db input signal of 3.6khz, 1.4 v p-p , r in and l in ? r out C 20 db r lp1 low pass filter resistance 7.5 10 12.5 k w r hpi high pass filter resistance 45 60 75 k w r lpf lp pin impedance 7.5 10 12.5 k w standard surround sound effect control c range control range - 21 - 6 db s step step resolution 1 db surround sound matrix phase r ps10 phase shifter 1: d1 = 0, d0 = 0 8.8 11.8 14.8 k w r ps11 phase shifter 1: d1 = 0, d0 = 1 10.6 14.1 17.6 k w r ps12 phase shifter 1: d1 = 1, d0 = 0 13.4 17.9 22.4 k w r ps13 phase shifter 1: d1 = 1, d0 = 1 28 37.3 46.6 k w r ps20 phase shifter 2: d3 = 0, d2 = 0 4.2 5.6 7 k w r ps21 phase shifter 2: d3 = 0, d2 = 1 5.1 6.8 8.5 k w r ps22 phase shifter 2: d3 = 1, d2 = 0 6.3 8.4 10.5 k w r ps23 phase shifter 2: d3 = 1, d2 = 1 13.7 18.3 22.9 k w r ps30 phase shifter 3: d5 = 0, d4 = 0 9 12.1 15.1 k w r ps31 phase shifter 3: d5 = 0, d4 = 1 10.9 14.5 18.1 k w r ps32 phase shifter 3: d5 = 1, d4 = 0 13.6 18.1 22.6 k w r ps33 phase shifter 3: d5 = 1, d4 = 1 29.3 39.1 48.9 k w r ps40 phase shifter 4: d7 = 0, d6 = 0 9 12.1 15.1 k w r ps41 phase shifter 4: d7 = 0, d6 = 1 10.9 14.5 18.1 k w r ps42 phase shifter 4: d7 = 1, d6 = 0 13.6 18.1 22.6 k w r ps43 phase shifter 4: d7 = 1, d6 = 1 29.3 39.1 48.9 k w srs surround sound matrix center srs control range -31 0 db step c center step resolution 1 db space srs space control range -31 0 db step s space step resolution 1 db p ersp1 perspective 1 input signal of 125hz space = 0db, center = mute r in = gnd; li n ? r out 12 db p ersp2 perspective 2 input signal of 2.15khz space = 0db, center = mute r in = gnd; li n ? r out 0db l+r l+ r srs curve space = mute, center =0db r in = gnd; li n ? r out -8.5 db l, r l, r srs curve space = mute, center = mute r in = gnd; li n ? l out l in = gnd; ri n ? r out -13.4 db TDA7464 5/21
electrical characteristics (continued) symbol parameter test condition min. typ. max. unit speaker & record attenuators c range control range 79 db s step step resolution 0.5 1 1.5 db e a attenuation set error av = 0 to -20db -1.5 0 1.5 db av = -20 to -79db -3 0 2 db v dc dc steps adjacent att. steps -3 0 3 mv a mute output mute condition 70 100 db r var input impedance 22.5 30 37.5 k w speaker attenuators v th zero crossingthreshold d7 = 0 v s 2 + 20 mv audio outputs n o(off) output noise (off) output mute, flat b w = 20hz to 20khz 4 5 m vrms m vrms n o(mov) output noise (movie) standard surround sound mode = movie , b w = 20hz to 20khz 30 m vrms n o(mus) output noise (music) standard surround sound mode = music , b w = 20hz to 20khz, 30 n o(sim) output noise (simulated) standard surround sound mode = simulated, b w = 20hz to 20khz 30 m vrms n o(srs) output noise (srs) surround sound b w = 20hz to 20khz 50 m vrms d distorsion av = 0 ; v in = 1vrms 0.01 0.1 % s c channel separation 70 90 db v ocl clipping level d = 0.3% 2 2.5 vrms r out output resistance 10 30 50 w v out dc voltage level 3.8 v bus inputs v il input low voltage 1 v v ih input high voltage 3 v i in input current -5 +5 m a v o output voltage sda acknowledge i o = 1.6ma 0.4 v m vrms TDA7464 6/21
i 2 c bus interface data transmission from microprocessor to the TDA7464 and viceversa takes place through the 2 wires i 2 c bus interface, consisting of the two lines sda and scl (pull-up resistors to positive supply voltage must be connected). data validity as shown in fig. 3, the data on the sda line must be stable during the high period of the clock. the high and low state of the data line can only change when the clock signal on the scl line is low. start and stop conditions as shown in fig.4 a start condition is a high to low transition of the sda line while scl is high. the stop condition is a low to high tran- sition of the sda line while scl is high. byte format every byte transferred on the sda line must con- tain 8 bits. each byte must be followed by an ac- knowledge bit. the msb is transferred first. acknowledge the master ( m p) puts a resistive high level on the sda line during the acknowledge clock pulse (see fig. 5). the peripheral (audioprocessor) that ac- knowledges has to pull-down (low) the sda line during this clock pulse. the audioprocessor which has been addressed has to generate an acknowledge after the recep- tion of each byte, otherwise the sda line remains at the high level during the ninth clock pulse time. in this case the master transmitter can gen- erate the stop information in order to abort the transfer. transmission without acknowledge avoiding to detect the acknowledge of the audio- processor, the m p can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. this approach of course is less protected from misworking. figure 3: data validity on the i 2 cbus figure 4: timing diagram of i 2 cbus f igure 5: acknowledge on the i 2 cbus TDA7464 7/21
software specification interface protocol the interface protocol comprises: a start condition (s) a chip address byte, containing the TDA7464 address a subaddress bytes a sequence of data (n byte + achnowledge) a stop condition (p) ack = achnowledge s = start p = stop a = address b = auto increment s 1 0 0 0 0 0 a 0 ack ack data ack p msb lsb msb lsb msb lsb chip address d95au226a b data subaddress data 1 to data n examples no incremental bus the TDA7464 receives a start condition, the cor- rect chip address, a subaddress with the msb = 0 (no incremental bus), n-data (all these data con- cern the subaddress selected), a stop condition. s 1 0 0 0 0 0 a 0 ack ack data ack p msb lsb msb lsb msb lsb chip address d95au306 0d3 subaddress data xxx d2 d1 d0 incremental bus the TDA7464 receives a start condition, the cor- rect chip address, a subaddress with the msb = 1 (incremental bus): now it is in a loop condition with an autoincrease of the subaddress whereas subaddress from "1xxx1010" to "1xxx1111" of data are ignored. the data 1 concerns thesubaddress sent, and the data 2 concerns the subaddress sent plus one in the loop etc. and, at the end, it receives the stop condition. s 1 0 0 0 0 0 a 0 ack ack data ack p msb lsb msb lsb msb lsb chip address d95au307 1d3 subaddress data 1 to data n xxx d2 d1 d0 TDA7464 8/21
msb lsb input attenuation d7 d6 d5 d4 d3 d2 d1 d0 0.5 db steps 10000 1 0 0 1 -0.5 1010-1 1 0 1 1 -1.5 1100-2 1 1 0 1 -2.5 1110-3 1 1 1 1 -3.5 4 db steps 1000 0 1001 -4 1010 -8 1011 -12 1100 -16 1101 -20 1110 -24 1111 -28 input attenuation = 0 ~ -31.5db input attenuation selection msb lsb subaddress d7 d6 d5 d4 d3 d2 d1 d0 bxxx00 0 0 input attenuation bxxx00 0 1 surround & out & effect control bxxx00 1 0 phase resistor bxxx00 1 1bass bxxx01 0 0 middle & treble bxxx01 0 1spe aker attenuation "l" bxxx01 1 0spe aker attenuation "r" bxxx01 1 1 record attenuation "l" bxxx10 0 0 record attenuation"r" bxxx10 0 1 input multiplexer, voice canceller & rec out bxxx10 1 0 srs / space attenuation bxxx10 1 1 srs / center attenuation b = 1 incremental bus; active b = 0 no incremental bus; x = dont care the first byte (subaddress) data bytes (address = 80(hex)): function selection: TDA7464 9/21
msb lsb d7 d6 d5 d4 d3 d2 d1 d0 surround mode 0 0 simulated 0 1 music 1 0 off 1 1 movie out 0 var 1 fix effect control 0000 -6 0001 -7 0010 -8 0011 -9 0100 -10 0101 -11 0110 -12 0111 -13 1000 -14 1001 -15 1010 -16 1011 -17 1100 -18 1101 -19 1110 -20 1111 -21 phase resistor selection msb lsb surround phase resistor d7 d6 d5 d4 d3 d2 d1 d0 phase shift 1 (k w ) 00 12 01 14 10 18 11 37 phase shift 2 (k w ) 00 6 01 7 10 8 11 18 phase shift 3 (k w ) 00 12 01 14 10 18 11 39 phase shift 4 (k w ) 00 12 01 14 10 18 11 39 standard surround selection TDA7464 10/21
bass selection msb lsb bass d7 d6 d5 d4 d3 d2 d1 d0 2 db steps 10000 -14 10001 -12 10010 -10 10011 -8 10100 -6 10101 -4 10110 -2 10111 0 11111 0 11110 2 11101 4 11100 6 11011 8 11010 10 11001 12 11000 14 TDA7464 11/21
middle & treble selection msb lsb middle d7 d6 d5 d4 d3 d2 d1 d0 2 db steps 0000 -14 0001 -12 0010 -10 0011 -8 0100 -6 0101 -4 0110 -2 0111 0 1111 0 1110 2 1101 4 1100 6 1011 8 1010 10 1001 12 1000 14 treble 2 db steps 0000 -14 0001 -12 0010 -10 0011 -8 0100 -6 0101 -4 0110 -2 0111 0 1111 0 1110 2 1101 4 1100 6 1011 8 1010 10 1001 12 1000 14 TDA7464 12/21
left channel speaker attenuation selection msb lsb speaker/record att d7 d6 d5 d4 d3 d2 d1 d0 1 db steps 000 0 001 -1 010 -2 011 -3 100 -4 101 -5 110 -6 111 -7 8 db steps 0000 0 0001 -8 0010 -16 0011 -24 0100 -32 0101 -40 0110 -48 0111 -56 1000 -64 1001 -72 mute 101x 11xx left & right channels both msb lsb zero cross att. mode d7 d6 d5 d4 d3 d2 d1 d0 1 db steps 0 on 1 off x = dont care speaker/record attenuation = 0db ~ -79db TDA7464 13/21
record and right channel speaker attenuation selection msb lsb speaker/record att d7 d6 d5 d4 d3 d2 d1 d0 1 db steps 000 0 001 -1 010 -2 011 -3 100 -4 101 -5 110 -6 111 -7 8 db steps 0000 0 0001 -8 0010 -16 0011 -24 0100 -32 0101 -40 0110 -48 0111 -56 1000 -64 1001 -72 mute 101x 11xx x = dont care speaker/record attenuation = 0db ~ -79db voice canceller/input/recout l & r selection msb lsb d7 d6 d5 d4 d3 d2 d1 d0 voice canceller 1 0 off 1 1on input multiplexer 1 0 0 0 0 in_2 1 0 1 0 1 in_3 1 1 0 1 0 in_4 1 1 1 1 1 in_1 rec out "l" 1 0 0 var 1 (3band) 1 0 1 var 2 (surr) 1 1 0 var 3 (rear) 1 1 1 fix rec out "r" 1 0 0 var 1(3band) 1 0 1 var 2 (surr) 1 1 0 var 3 (rear) 111 fix TDA7464 14/21
srs space control: attenuation selection msb lsb space attenuation d7 d6 d5 d4 d3 d2 d1 d0 1 db steps 000 0 001 -1 010 -2 011 -3 100 -4 101 -5 110 -6 111 -7 8 db steps 000 0 001 -8 010 -16 011 -24 mute 1xxxxx x = dont care speaker/record attenuation = 0db ~ -31db srs center control: attenuation selection msb lsb center attenuation d7 d6 d5 d4 d3 d2 d1 d0 1 db steps 000 0 001 -1 010 -2 011 -3 100 -4 101 -5 110 -6 111 -7 8 db steps 000 0 001 -8 010 -16 011 -24 mute 1xxxxx srs input 0 no surround signal 1 surround signal srs switch 0 srs on 1 srs off x = dont care space attenuation = 0db ~ -31db recommended to attenuate -3db in input attenuation during "srs off" to fulfill srs bypass mode when srs function is used TDA7464 15/21
power on reset surround & out control+ effect control off + fix + max attenuation speaker/record attenuation l &r mode mute + zero cross att.off input attenuation + rear switch max attenuation + on voice canceller off input in1 mix switch no mix pin srs surround off + max attenuation bass & middle 2db treble 0db v s d96au477 20 m a gnd gnd 10 w gnd pins: l-out, r-out, recout-l, recout-r 50k gnd v s v ref d94au200 20 m a pin: l-in1, r-in1, l-in2, r-in2, l-in3, r-in3, l-in4, r-in4, 5.5k 60k gnd v s hp1 d94au199 20 m a 5.5k pin: hp2 10k 60k gnd v s lp1 hp2 d94au198 pin: hp1 pin description TDA7464 16/21
d94au205 20 m a gnd pin: scl, sda 10k v s d94au211 20 m a hp1 gnd pin: lp1 v s d96au473 20 m a gnd pin: netw2 v s d95au308 20 m a gnd pin: ps1, ps2, ps3, ps4, lp 20 m a v s 30k vref d95au227 sw gnd pin: var-l, var-r, 20k v s d95au336 20 m a 20k gnd 42k pin: cref TDA7464 17/21
20 m a v s d95au234 sw gnd pin: nblin, nbrin 10k v s d95au233a 20 m a gnd gnd pin: vout ref 25k v s d95au309 20 m a gnd pin: treble-l, treble-r 45k or 25k v s d95au231a 20 m a bass-ro,middle-lo,middle-ro bass-lo gnd : bass : middle pin: bass-li, bass-ri, middle-li, middle-ri, v s d95au230 20 m a gnd pin: basso-l, basso-r, netw1 (*) v s d95au232 20 m a bass-li,bass-ri,middle-li,middle-ri gnd (*) 45k : bass 25k : middle pin: bass-lo, bass-ro, middle-lo, middle-ro, TDA7464 18/21
vref v s d95au235a gnd pin: nblo, nbro TDA7464 19/21
tqfp44 (10 x 10) dim. mm inch min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.30 0.37 0.45 0.012 0.014 0.018 c 0.09 0.20 0.004 0.008 d 12.00 0.472 d1 10.00 0.394 d3 8.00 0.315 e 0.80 0.031 e 12.00 0.472 e1 10.00 0.394 e3 8.00 0.315 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.039 k 0 (min.), 3.5?(typ.), 7 (max.) a a2 a1 b seating plane c 11 12 22 23 33 34 44 e1 e d1 d e 1 k b tqfp4410 l 0.10mm .004 outline and mechanical data TDA7464 20/21
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the cons equences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this p ublication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2003 stmicroelectronics - all rights reserved the sound retrieval system and are registered trademarks of srs labs, inc. stmicroelectronics group of companies australia C belgium - brazil - canada - china C czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com TDA7464 21/21

▲Up To Search▲

Price & Availability of TDA7464

	To Download TDA7464 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .